1. Field of the Invention
This invention relates to an electro-luminescence display (ELD), and more particularly to the driving of an electro-luminescence display device.
2. Description of the Related Art
Flat panel display devices have the advantages of reduced weight and reduced bulk over cathode ray tube (CRT) devices. Such flat panel display devices include a liquid crystal display (LCD), a field emission display (FED), a plasma display panel (PDP) and an electro-luminescence (EL) display, etc. In particular, the EL display device is a self-luminous device capable of light-emission by a re-combination of electrons with holes in a phosphorescent material. EL display devices are generally classified into inorganic EL devices that use an inorganic compound as a phosphorescent material and organic EL devices that use an organic compound as a phosphorescent material. An EL display device has the advantages of low driving voltage, self-luminescence, thin profile, wide viewing angle, fast response speed, and high contrast.
The organic EL device includes an electron injection layer, an electron carrier layer, a light-emitting layer, a hole carrier layer and a hole injection layer. When a predetermined voltage is applied between an anode and a cathode in the organic EL device, electrons produced from the cathode are moved via the electron injection layer and the electron carrier layer into the light-emitting layer while holes produced from the anode are moved via the hole injection layer and the hole carrier layer into the light-emitting layer. The electrons and the holes respectively fed from the electron carrier layer and the hole carrier layer re-combine at the light-emitting layer so as to emit light.
FIG. 1 is a schematic block diagram showing a configuration of a related art electro-luminescence display device. As shown in FIG. 1, an active matrix type EL display device includes an EL panel 20 having pixels 28 arranged between scan lines SL and data lines DL, a scan driver 22 for driving the scan lines SL of the EL panel 20, a data driver 24 for driving the data lines DL of the EL panel 20, a gamma voltage generator 26 supplying the data driver 24 with a plurality of gamma voltages, and a timing controller 27 for controlling the data driver 24 and the scan driver 22. The EL panel 20 has pixels 28 arranged in a matrix. Further, the EL panel 20 has a feeding pad 10 supplied with a supply voltage from an external voltage supply source VDD and a ground pad 12 supplied with a ground voltage from an external ground voltage source GND. For example, the supply voltage source VDD and the ground voltage source GND may be incorporated from a power supply. The supply voltage from the feeding pad 10 is fed into each pixel 28. The ground voltage from the ground pad 12 is also fed into each pixel 28.
As also shown in FIG. 1, an active matrix type EL display device includes peripheral devices to the EL panel 20. A scan driver 22 applies a scanning pulse to the scan lines SL to sequentially drive the scan lines SL. A gamma voltage generator 26 applies gamma voltages having various voltage values to the data driver 24. A data driver 24 converts a digital data signal from the timing controller 27 into an analog data signal using a gamma voltage from the gamma voltage generator 26. A data driver applies the analog data signal to the data lines DL whenever the scanning pulse is supplied. A timing controller 27 generates a data control signal for controlling the data driver 24 and a scan control signal for controlling the scan driver 22 using synchronizing signals fed from an external system (e.g., a graphic card). The data control signal generated from the timing controller 27 is applied to the data driver 24 thereby controlling the data driver 24. The scan control signal generated from the timing controller 27 is applied to the scan driver 22 to thereby control the scan driver 22. Furthermore, the timing controller 27 applies the digital data signal from the external system to the data driver 24.
FIG. 2 is a detailed circuit diagram of the pixel shown in FIG. 1. Each of the pixels 28 receives the data signal from the data line DL when the scanning pulse is applied to the scan line SL to thereby generate a light corresponding to the data signal. To this end, as shown in FIG. 2, each pixel 28 includes an EL cell OEL having a cathode connected to the ground voltage source GND (i.e., a voltage supplied from the ground pad 12), and a cell driver 30 connected to the scan line SL, the data line DL and the supply voltage source VDD (i.e., a voltage supplied from the feeding pad 10) and to the anode of the EL cell OEL to drive the EL cell OEL. The cell driver 30 includes a switching thin film transistor T1 having a gate terminal connected to the scan line SL, a source terminal connected to the data line DL and a drain terminal connected to a first node N1, a driving thin film transistor T2 having a gate terminal connected to the first node N1, a source terminal connected to the supply voltage source VDD and a drain terminal connected to the EL cell OEL, and a capacitor C connected between the supply voltage source VDD and the first node N1.
FIG. 3 is a waveform diagram for describing a procedure of driving the scan line and the data line. The switching thin film transistor T1 is turned on when a scanning pulse is applied to the scan line SL, to thereby apply a data signal to the data line DL to the first node N1. The data signal supplied to the first node N1 is charged into the capacitor C and applied to the gate terminal of the driving thin film transistor T2. The driving thin film transistor T2 controls a current amount I fed from the supply voltage source into the EL cell OEL in response to the data signal applied to the gate terminal thereof, thereby controlling a light-emission amount of the EL cell OEL. Further, since the data signal is discharged from the capacitor C even though the switching thin film transistor T1 is turned off, the driving thin film transistor T2 applies a current I from the supply voltage source VDD until a data signal at the next frame is supplied, to thereby keep an emission of the EL cell OEL.
The driving of the related art EL display device, as described above, has a problem in that a parasitic capacitor exists in the data line DL that causes a deterioration of picture quality. Moreover, such a picture quality deterioration phenomenon becomes particularly serious when a low gray level is supposed to be displayed. More specifically, various parasitic capacitors generally exist in the data line DL. The data line DL may have a parasitic capacitance with the scan line SL. There may also be a parasitic capacitance between the upper substrate (not shown) and the data line DL. Further, a parasitic capacitance can exist between adjacent data lines. Furthermore, a parasitic capacitance can exist between the data line DL and the EL cell OEL. The total parasitic capacitance existing for the data line DL can be approximately 50 to 100 times higher than the capacitance C of the pixel 28.
The parasitic capacitance in the data line DL of a related art EL device can delay a discharge time of a voltage (or current) charged in the pixel 28 upon display of the picture to thereby cause a failure in obtaining a desired picture. Further, the related art EL display device has a limit in controlling a low driving current applied to the light-emitting cell OEL. More particularly, the related art EL device has a limit in charging or discharging the capacitor C of the pixel 28 because the parasitic capacitance of the data DL negatively effects the application of current to the light-emitting cell OEL when a picture is implemented.